WP4 will provide design tools and architectural design for MRAM-based micro controller unit (MCU) to be used in high-end M2M IoT platforms.
- To investigate, design, develop, and analyze hybrid MRAM-CMOS digital building blocks, architecture and subsystem for embedded system applications, particularly mobile and IoT.
- To investigate normally-off computing to reduce cost and energy using hybrid MRAM-CMOS architecture
- To tackle the reliability and resilience issues
Task 4.1 Exploration tools for Digital MRAM circuits (KIT, LIRMM, CEA)
An important step in this task is to develop a hierarchical simulation framework capable of experimenting with various architectural design parameters.
Task 4.2 Memory convergence Techniques (LIRMM, KIT)
The goal of this task is to converge several memory types and technologies used in typical embedded systems, particularly IoT systems, into few memory technologies in order to reduce in priority power consumption, then cost, and to maintain performance requirements. All these techniques will support instant on/off capabilities to address energy efficiency for IoT embedded applications.
Task 4.3 Exploration of MRAM for custom logic (KIT, LIRMM, EVADERIS)
We explore how MRAM can be used for random logic and special purpose computing blocks, as the building blocks dedicated functions (DSP, GPU, crypto processors), as required in IoT.