- Scientific publications
A Cross-layer Adaptive Approach for Performance and Power Optimization in STT-MRAM
N. Sayed, R. Bishnoi, F. Oboril, and M. B. Tahoori, in proceedings of Design, Automation & Test in Europe (DATE), 2018, Germany.
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Parametric Failure Modeling and Yield Analysis for STT-MRAM
S. Mohanachandran Nair, R. Bishnoi, and M. B. Tahoori, in proceedings of Design, Automation & Test in Europe (DATE), 2018, Germany.
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D3.1 - Validation of the first test chip for each IP block
This document summarizes IP blocks that have been designed by LIRMM during the first two years of the project. Most of these IPs have been sent to fabrication (T.O of dec 2016 & feb 2017).
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Process Variation and Temperature Aware Adaptive Scrubbing for Retention Failures in STT-MRAM
N. Sayed, S. Mohanachandran Nair, R. Bishnoi, and M.B. Tahoori, in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2018, Korea.
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VAET-STT: A Variation Aware STT-MRAM Analysis and Design Space Exploration Tool
S. Mohanachandran Nair, R. Bishnoi, M. S. Golanbari, F. Oboril, F. Hameed, and M. B. Tahoori, "VAET-STT: A Variation Aware STT-MRAM Analysis and Design Space Exploration Tool",in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2017
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D6.5 - 1st Management Periodic Report
The Management Periodic Report provides an overview of direct and indirect costs, but also subcontracting costs incurred by each beneficiary, linking them to work packages. This report consolidates the claimed Community contribution of all the beneficiaries (and third parties) in an aggregate form, based on the information provided by each beneficiary.
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D6.6 - 1st Community Periodic Contribution
This deliverable details how the public prefinancing, received from the European commission, has been shared among the project partners.
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Download MAGPIE for free
MAGPIE, developped by CNRS LIRMM, is holistic design evaluation tool which aims at integrating emerging NVM technologies in manycore systems. MAGPIE explorer enables a designer to specify input design specifications and run a seamless evaluation flow that automatically produces results including application outputs, performance numbers, area, power and energy consumption.
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